Chapter 3: Digital Memory and Storage
Introduction
Digital memory is essential to every computing system. It provides the storage needed to hold data, instructions, and system states, whether temporarily (like RAM) or permanently (like ROM). Memory devices vary in speed, cost, volatility, and purpose. In this section, we'll explore the fundamental types of memory and how they are organized and interfaced in digital systems.
3.1 Types of Memory: SRAM vs. DRAM
Memory is broadly categorized into two main types based on how data is stored and refreshed:
- SRAM (Static RAM): Uses flip-flop circuits to store each bit. It is fast and does not require refreshing but consumes more power and is more expensive. Typically used for cache memory in CPUs.
- DRAM (Dynamic RAM): Stores each bit in a capacitor. It is slower than SRAM and must be periodically refreshed, but it is cheaper and more compact. Used as main system memory.
Comparison Table:
Characteristic | SRAM | DRAM |
---|---|---|
Speed | Fast | Slower |
Cost | High | Low |
Density | Low | High |
Refresh Needed | No | Yes |
Typical Use | Cache | Main memory |
3.2 Read-Only Memory (ROM) and Flash Memory
ROM is a non-volatile memory type, meaning it retains data even when power is removed. Flash is a modern type of ROM that can be electrically erased and reprogrammed.
- ROM: Contents are fixed during manufacturing or programmed once (PROM). Used for firmware and bootloaders.
- EEPROM: Electrically erasable PROM, allows reprogramming of small amounts of data.
- Flash: Similar to EEPROM but can erase large blocks of data. Common in USB drives, SSDs, and microcontrollers.
3.3 Memory Addressing and Organization
Memory is structured into addressable units. Each address corresponds to a fixed-size word (e.g., 8-bit, 16-bit, or 32-bit).
The total number of memory locations is determined by the number of address lines:
- 10 address lines โ 210 = 1024 memory locations
- 16 address lines โ 216 = 65,536 locations (64 KB)
Memory cells are typically organized into rows and columns, and addressing schemes include:
- Byte-addressable memory: each address points to a single byte
- Word-addressable memory: each address points to a multi-byte word
3.4 Memory Interfacing and Timing
Interfacing memory with a processor or controller requires a clear protocol for reading and writing data. Key signals include:
- CE (Chip Enable): Activates the memory chip
- OE (Output Enable): Enables output drivers for reading
- WE (Write Enable): Allows writing data into memory
Memory operations follow a sequence of signal changes:
- Read cycle: Set address โ Assert CE and OE โ Read data
- Write cycle: Set address and data โ Assert CE and WE โ Write data
Summary
- SRAM and DRAM serve different purposes: speed vs. capacity
- ROM and Flash store firmware and permanent data
- Memory addressing defines how processors access specific data locations
- Proper interfacing ensures reliable data exchange with memory devices
๐งช MicroSim
โ Quiz: Check Your Understanding
1. Which memory type requires refreshing to retain data?
- A) SRAM
- B) DRAM
- C) ROM
- D) Flash
Show Answer
Correct answer: B) DRAM
2. Which memory type is used to store the BIOS?
- A) SRAM
- B) DRAM
- C) ROM
- D) RAM
Show Answer
Correct answer: C) ROM
3. What does 16 address lines allow you to access?
- A) 256 bytes
- B) 1024 locations
- C) 64 KB
- D) 1 MB
Show Answer
Correct answer: C) 64 KB