Chapter 5: FPGA Architecture and Development

Introduction

Field-Programmable Gate Arrays (FPGAs) are reconfigurable integrated circuits used for implementing custom hardware functions. Their flexibility makes them ideal for prototyping, digital signal processing, embedded systems, and more. In this section, we'll explore the internal architecture of FPGAs, how they compare to ASICs, and the design flow from HDL code to a programmed chip.

5.1 FPGA vs. ASIC: Trade-offs and Use Cases

FPGAs and ASICs serve similar purposes—implementing digital logic—but they differ fundamentally:

• FPGAs are reprogrammable and suited for rapid development and prototyping.
• ASICs are fixed-function chips, optimized for performance and cost at scale.

Comparison:

Aspect	FPGA	ASIC
Reprogrammable	Yes	No
Development Cost	Low	High (Non-Recurring Engineering cost)
Unit Cost	High	Low (at high volume)
Performance	Lower	Higher
Time to Market	Fast	Slow

5.2 Look-Up Tables (LUTs), Flip-Flops, and Interconnects

LUTs are the fundamental building blocks in FPGAs. They implement logic functions by storing output values for all input combinations.

• LUT: A small truth table that acts as a logic gate or small logic function.
• Flip-Flop: Stores the output value for use in sequential logic.
• Interconnect: The routing fabric that links LUTs and flip-flops together.

5.3 Configurable Logic Blocks (CLBs)

CLBs are modular blocks in an FPGA containing:

• One or more LUTs
• Flip-flops for storage
• Control logic (e.g., multiplexers)

CLBs are tiled across the FPGA and are connected via programmable interconnects. They are the key to implementing digital circuits using Verilog or VHDL.

5.4 FPGA Programming and Bitstream Generation

Once a design is described in Verilog and synthesized, it must be translated into a bitstream—a binary file that configures the FPGA hardware.

1. Synthesis: Converts HDL to logic gates.
2. Implementation: Maps logic to LUTs, places them, and routes connections.
3. Bitstream Generation: Encodes the configuration bits for the FPGA.

This file is then loaded onto the FPGA using a programmer or through boot memory on startup.

5.5 FPGA Synthesis, Placement, and Routing

The FPGA toolchain handles three key tasks:

• Synthesis: Generates a netlist of logic gates and flip-flops from HDL.
• Placement: Assigns logic elements to physical CLBs on the FPGA.
• Routing: Connects placed elements using the programmable interconnect.

Design quality is affected by timing closure, logic utilization, and routing congestion.

Summary

• FPGAs offer flexibility while ASICs offer performance and efficiency for mass production.
• LUTs, flip-flops, and interconnects are the core components of FPGAs.
• CLBs organize these elements into reusable tiles for logic implementation.
• Bitstream generation translates HDL designs into a binary format to configure the FPGA.
• Synthesis, placement, and routing are critical steps in the FPGA design process.

🧪 MicroSim

Link to Simulation Demo

✅ Quiz

1. What is the purpose of a LUT in an FPGA?

• A) To store memory
• B) To connect CLBs
• C) To implement logic functions
• D) To enable serial communication

Show Answer

Correct answer: C) To implement logic functions

2. Which step follows synthesis in the FPGA toolchain?

• A) Timing analysis
• B) Bitstream upload
• C) Placement
• D) HDL debugging

Show Answer

Correct answer: C) Placement

3. Which feature allows FPGAs to be reprogrammable?

• A) Flash memory
• B) CLBs
• C) Bitstream
• D) ASIC conversion

Show Answer

Correct answer: C) Bitstream